Vehicle Inverter Design Based on SG3525A

With the improvement of the economic level, cars are gradually becoming the daily transportation of people. However, electronic products that people carry with them, such as mobile phones, cannot use the power supply of the car, so developing an economical and practical car inverter becomes one. Kind of demand.

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We use the integrated pulse width modulation chip SG3525A as the main control chip, and the CD4020B counter and the NAND gate circuit form a frequency division and phase separation circuit and are equipped with a protection circuit to realize the pulse width modulation of the inverter when it is working in the inverter power supply. The continuous output power is 100W, and it has the functions of output overcurrent protection and input undervoltage protection, which can realize functions such as power supply inverter, voltage stability, undervoltage protection and overcurrent protection.

1 System basic principles

The input end of the inverter is a car battery (+12V, 4.5Ah), and the output end is a power frequency square wave voltage (50Hz, 220V). The system main circuit and control circuit block diagram are shown in Figure 1, using a typical secondary Transform, that is, DC/DC conversion and DC/AC inverter 12V DC voltage is inverted into a high-frequency square wave by push-pull conversion, boosted by a high-frequency step-up transformer, and then rectified and filtered to obtain a stable DC voltage of about 320V; In the bridge-type transformation, the square-wave inverter is used to invert the stable DC voltage into a square wave voltage with an effective value slightly larger than 220V, so as to drive the load to ensure the reliable operation of the system, respectively, the DC high-voltage side voltage signal and current are collected. The signal and battery voltage signals are sent to the SG3525A to adjust the duty cycle or turn-off pulse of the drive pulse to achieve voltage regulation, overcurrent protection and undervoltage protection.

Figure 1 System main circuit and control circuit block diagram

2 main technical parameters

Input voltage: DC 12V;

Output voltage: AC 220V ± 5%, 50Hz ± 2%;

Rated power: 100W;

Protection function: input DC polarity reverse protection, input undervoltage protection, output overcurrent protection

3 circuit design

3.1 main control chip SG3525A

SG3525A is a pulse width modulator control integrated circuit produced by ST company with integrated reference voltage, oscillator synchronization, soft start time control, input undervoltage lockout and other functions. The pin of SG3525A is shown in Figure 2.

Figure 2 SG3525A pin distribution

Determination of the oscillation frequency: The oscillation frequency is set by three external components RT, CT and RD, and the oscillation frequency is connected to the 6, 5, and 7 pins, respectively, fOSC=1/CT (0.7RT +3RD), wherein 0.7RTCT is Timing capacitor charging time, 3RDCT is the timing capacitor discharge time In order to make the frequency division and phase separation circuit obtain the 50Hz oscillation frequency, the design sets the oscillation frequency to 51.2kHz, taking CT=2000pF RT=10kΩ, RD=922Ω.

Output pulse width adjustment: PWM pulse width is controlled by the lower level end of pin 9 and pin 8. The error amplifier U1 inside the chip amplifies the voltage feedback signal and the reference voltage signal and sends it to the reverse of comparator U2. At the input end, the input to the positive input of the comparator comes from the sawtooth wave on the capacitor CT. After comparing the two, the square wave pulse is output to control the duty cycle of the SG3525A internal output power amplifier tube (see Figure 3). The pin is grounded via a capacitor, and the 9-pin is connected to the DC/DC high-voltage DC voltage feedback voltage, thereby adjusting the stability of the output DC voltage. In Figure 3, U1 is the error amplifier in SG3525A, and 1, 2, and 9 are chip pins, respectively. R1 ~ R7, C1, C2 are external resistors and capacitors SG3525A 16-pin output 5V reference voltage resistors R3, R4 and U1 constitute an inverse proportional operator, R4 / R3 is its static magnification, the greater the value, the higher the control accuracy but If the amplification factor is too large, it will cause oscillation. Therefore, the introduction of C1 and R5 makes the error amplifier become an incomplete proportional integral controller. At this time, the static error amplification factor is constant, and the dynamic error amplification factor is reduced, which does not affect the control accuracy and avoids. Avoid overshoot and cause oscillation.

Figure 3 Output DC high voltage regulation schematic

Pulse off: When the 10 pin is high level, the output pulse is blocked. This design uses this function to protect the output over-current and input under-voltage.

3.2 frequency division and phase separation circuit

The frequency division circuit is composed of a 14-stage serial binary count/distributor CD4020B. The frequency-divided signal is from the oscillator output of the SG3525A. Pin 4, A, B, and C in Figure 4 represent oscillator pulses through 8, 9, and 10 levels, respectively. The divided waveforms have their frequencies fA=fOSC/28 fB=fOSC/29 fC=fOSC/210 phase separation circuit consists of a single-chip two-input four-in-four CD4011BC and peripheral devices, which combines the signal ABC logic into The drive pulse (A+B)C and (A+B)C signals required by the inverter bridge have a common dead zone, and the signal frequency is about 50 Hz.

Figure 4 frequency division and phase separation waveform

3.3 Protection circuit

1 input undervoltage protection

As shown in Figure 5, D1 is the battery polarity reverse connection protection SG3525A pin 16 output reference voltage 5V take R3 = R4 = 10kΩ Under normal circumstances, U1's inverting input terminal voltage is greater than the forward input terminal voltage, U1 output Low level, diodes D1, D2 are off When the battery voltage is lower than 10V, the comparator U1 starts to work, the output changes from low level to high level, D2, D3 turn on, and raise the potential of the non-inverting input terminal to high power. Flat, so that U1 always outputs a high level and outputs a shutdown signal to pin 10 of the SG3525A.

2 output current overload protection

As shown in Figure 6, the op amp U2 and the peripheral resistor form an inverse proportional amplifier, and the op amp U3 and the peripheral circuit form a comparator. R3 in Figure 1 is a sampling resistor, which takes 2.2 Ω, 2W, when the load current increases, the voltage of the resistor The drop ΔU increases.

Figure 6 output current overload protection circuit

The input voltage of the forward input terminal of the operational amplifier U3 is: U+=(1+R2/R1)×(R3/R4)×△U.

Appropriate adjustment of the values ​​of R1, R2, R3, and R4, so that when the load current exceeds 1.5A, the potential of the forward input terminal of U3 is higher than the reverse input terminal, the output is high, and the diodes D2 and D3 are turned on, and The potential of the non-inverting input is raised to a high level, so that U1 always outputs a high level and outputs a shutdown signal to the 10 pins of the SG3525A.

4 thermal design

In order to further reduce the volume and reduce the weight, a heat dissipation method using the outer casing (the casing) is adopted, which not only solves the heat dissipation, but also reduces the volume of the whole machine and reduces the weight.

Inverter test output waveform

The DC/DC conversion output voltage is stable at 320V, and the inverter bridge switching frequency is 50Hz. The circuit waveform of the 500Ω resistance load experiment is shown in Figure 7.

Figure 7 test circuit output waveform

5 Conclusion

The vehicle inverter power supply circuit designed in this paper mainly adopts integrated chip, which makes the circuit structure simple, stable performance and low cost. The actual application proves that the inverter power supply works stably and reliably, and can continuously output power of 100W.

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