Bulldozer processor can be accelerated to 4GHz Godson to do

The new International Solid State Circuit Conference (ISSCC) will be held on February 20-24, 2011. As a semi-conductor industry event and technical enthusiast feast, major players in the industry will gather and share their latest achievements.

Let's take a look at how AMD describes its bulldozer architecture in two abstracts:

"The bulldozer dual-core processor module contains 213 million transistors and 11 metal layers fabricated on a 32nm HKMG (High-K Metal Gate) SOI CMOS process with a design voltage range of 0.8-1.3V. This microarchitecture is comparable to the previous The AMD x86-64 processor will improve performance and frequency while reducing core area and power consumption.The new design will reduce the relative number of gates/periods compared to previous designs, in an area of ​​30.9 mm 2 (including 2MB L2 cache) up to 3.5GHz frequency."

"The 8MB L3 cache consists of four independent 2MB sub-caches, which should be similar to the Intel Sandy Bridge's three-level cache block design, and it is built on a 32nm SOI process. It has Column-Select Aliasing features that can improve area efficiency, Power gated, floating bit lines, thereby reducing leakage power consumption, as well as centralized redundant rank blocks, thereby improving yield and testability.(Level 3) The buffer voltage is 1.1V and the operating frequency exceeds 2.4GHz. ”

Bulldozer architecture with a single dual-core module of 213 million transistors, then the quad-module eight-core top desktop model should have 852 million transistors, and the server's six-module twelve-core version as much as 1.278 billion, not including the core of the third-level cache The area is 185.4 square millimeters. In comparison, the current six-core Thuban Phenom II X6 is based on the 45nm SOI process, with 904 million transistors and a core area of ​​346 square millimeters.

The frequency will at least exceed 3.5GHz, and with the help of the second-generation dynamic acceleration technology Turbo Core 2.0, an additional 500MHz should be no problem, which means that the bulldozer processor can completely run above 4GHz after closing some of the cores.

In addition, we can also see in the conference schedule that the Chinese Academy of Sciences and Godson Technology Research Center will also attend and introduce the new Godson-3B processor.

“Loongson III B is an eight-core high-performance processor manufactured using a 65nm CMOS LP/GP process combined with seven copper metallization layers. It contains 582.6 million transistors, a core area of ​​299.8 square millimeters, and a maximum frequency of 1.05 GHz. Single/double-precision floating-point peak performance 256/128 GFlops, power consumption 40W."

Intel has mentioned that the Westmere-EX, a server processor with ten cores, is expected to be released next year, or named Xeon 7600 series.

"This single-chip, 10-core Xeon processor is designed and built using a 32nm 9M process, with a shared L3 cache, and introduces a low-power mode to reduce idle power. A second command, CTLE equalizer, was added to the I/O receiver. And the temperature compensation mechanism ensures link availability even in the lower RX range. The core and cache recovery technologies ensure maximum yield."

IBM will also come up with the highest frequency microprocessor in the history of 5.2GHz, and for the first time revealed that it has 24MB on-chip shared L3 cache, and in order to achieve this frequency, IBM overcomes many problems such as timing, power consumption, noise and so on.