Two-to-four-wire converter connected to full-duplex bus
Multipoint data communication networks, such as Profibus, Modbus, and BACnet, typically require versatile bus systems that support both RS-485 dual-wire half-duplex and four-wire full-duplex configurations. These systems can span hundreds of meters and are designed to handle significant ground potential differences (GPD). However, these voltage variations can exceed the common-mode voltage range of standard transceivers, potentially causing damage to connected devices. To mitigate this risk, an electrically isolated transceiver is used to separate the control electronics of the bus node from the actual transceiver stage on the bus. Figure 1 illustrates a block diagram of a hybrid network using a 2-4 line converter.
Figure 1: A 2-4 line converter ensures compatibility between half-duplex and full-duplex systems
To ensure the converter operates independently of the data rate, the driver and receiver of the converter are controlled based on the logic state of the bus. At every bit interval, the bus driver is activated, allowing the converter to function regardless of the signal's data rate. This design simplifies the overall system by eliminating the need for external timing controls.
The control logic is straightforward: drivers D1 and D2 are only enabled when the opposite receiver (R1 or R2) outputs a logic low. During idle periods, both receiver outputs remain high due to a fault protection voltage of VFS > 200 mV at the receiver input. An inverter gate then converts this high signal to a low, enabling the receiver while keeping the driver inactive.
In the half-duplex to full-duplex direction (Figure 2: left to right), a negative voltage at the R1 input triggers driver D2, which activates with a low input. D2 then drives the transmission bus with a negative output. When the bus voltage at R1 becomes positive, D2 turns off. However, its output remains high due to the fail-safe bias resistor RFS, maintaining a stable bus voltage VFS.
(Note: Throughout the entire operation, R2’s output is always high, ensuring that R1 remains active and D1 stays inactive.)
Figure 2: Timing for half-duplex to full-duplex conversion
In the full-duplex to half-duplex direction (Figure 3: right to left), a negative voltage at the R2 input activates driver D1, which is triggered by a low input. D1 then drives the two-wire bus with a negative voltage. When the bus voltage at R2 becomes positive, D1 turns off after a delay. During this delay, D1 continues to drive the bus with a negative voltage before switching to high impedance, preventing unwanted switching transients at the R1 output.
We recommend that the minimum delay time, determined by the RD·CD time constant, should be at least 1.3 times the maximum propagation delay of the driver. This accounts for component tolerances, inverter thresholds, and supply voltage variations. Given the capacitance values, the required RD value can be calculated using Equation 1:
Equation 1
Where tPLH-max is the maximum low-to-high propagation delay of driver D2, VIT+min is the minimum positive input threshold of the Schmitt-triggered inverter, and VCC-max is the maximum supply voltage.
After D1 turns off, the bus voltage VFS, created by the fault protection bias resistor RFS, remains high. When the bus voltage at R2 returns to negative, the CD capacitor discharges rapidly through the discharge diode DD, activating the circuit again. The timing diagram in Figure 3 shows how a remote receiver on the half-duplex bus (denoted as R) interprets the negative bus voltage as a low bit. A high bit consists of a positive main drive voltage and a residual VFS voltage.
Figure 3: Timing for full-duplex to half-duplex conversion
Both converter ports require isolated power supplies, VISO-1 and VISO-2, derived from a central 3.3V source. Figure 5 presents the schematic for this isolated power supply design. To prevent output peak voltages under no-load conditions, each rectified output includes a minimum load resistor of 2 kΩ.
Figure 5: Isolated power supply design for VISO-1 and VISO-2
In summary, a 2-4 wire converter allows a single half-duplex transceiver or an entire half-duplex bus to interface with a full-duplex bus. When connecting the converter to a full-duplex bus, it's important to note that the master node's microcontroller must switch from full-duplex to half-duplex mode when communicating with the converter node. This ensures proper signal integrity and prevents conflicts on the bus.
Differential Mode Ring Inductance,Differential Mode Inductor Series,Differential Mode Filter Inductor,Differential-mode choke
Xuzhou Jiuli Electronics Co., Ltd , https://www.xzjiulielectronic.com